The present invention relates to a semiconductor memory and more particularly to a read only memory (referred to as "ROM" hereinafter).
With the recent development in semiconductor techniques and semiconductor device application techniques, there has been an increasing need for a semiconductor memory with a large capacity.
To obtain a ROM with a large capacity, various problems must be solved.
In a ROM with a large capacity, for example, a large number of memory cells are connected to each of the data lines. In consequence, the data lines are unfavorably coupled with stray or parasitic capacitance which is relatively large in value. In a ROM, for example, the content of data stored in a selected memory cell is judged according to whether, after the stray and parasitic capacitances coupled to the data line are precharged, the selected memory cell discharges the electric charge in its capacitance. More specifically, the data in the selected memory cell is judged according to whether, after the potential of the data line is raised to a predetermined value, the selected memory cell causes the data line potential to be lower than the predetermined value. Since a ROM with a large capacity has data lines unfavorably coupled with stray or parasitic capacitance which is relatively large in value, the selected memory cell requires a comparatively long time to make the data line potential become lower than a predetermined value. As a result, a ROM with a large capacity disadvantageously requires a relatively long time to read out data from a desired memory cell.
Moreover, in a ROM with a large capacity, the stray or parasitic capacitance coupled to the data lines has large values. Therefore, it takes a considerably long time from the time when precharging of the capacitances is started until the data line potential is made a predetermined value. In consequence, a ROM with a large capacity requires a relatively long time from one data output opertion to the subsequent data output operation.
It is desirable that the power consumption of the ROM be small from various points of view.
In addition, any defect in memory cells becomes a serious problem particularly in a ROM with a large capacity.
Hitherto, a circuit has been utilized, based on one of the known information theories, in which data error is corrected by employing an error correcting code (the circuit will be referred to as "ECC circuit" hereinafter).
Prior to this invention, the inventor contrived to improve the production yield of a semiconductor memory by incorporating an ECC circuit in a one-chip semiconductor memory thereby to redress a defective memory cell.